Why nand gate is used in flip flop

You get 4- dual-input gates in a 14 or 16 pin package and the goal was to minimise the package count while maintaining extremely-good reliability. They all cost about the same per package. The goal was to minimise the total number of packages in the design. Many of my designs were used in industrial settings. This gave me extremely good noise filtering and the series resistor provided significant ESD and transient protection. Some of those designs were used for decades with no failures.

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Viewed times. Considering the above circuit. As a result, there is no change in state. According to the NAND gate principle. And there is no change in the state. The flip-flop goes to an unstable state as both the output goes LOW. When any mechanical switch makes or breaks contact, the connection will make and break several times before the full connection is made or broken.

While for many applications this may not be a problem, it is when the switch interfaces to logic circuitry. Here a series of pulses will pass into the circuit, each one being captured and forming a pulse.

Dependent upon the circuit this may appear as a series of pulses, and falsely triggering circuits ahead of time.

It is possible to overcome this problem using a simple RS flip flop. By connecting the switch as shown below, the flip flop will change on the first sign of contact being made.

Further pulses will not alter the output of the circuit. This type of flip flop is obtained from the SR flip flop by connecting the R input through an inverter, and the S input is connected directly to data input. The modified clocked SR flip-flop is known as D-flip-flop and is shown below.

From the truth table of SR flip-flop we see that the output of the SR flip-flop is in unpredictable state when the inputs are same and high.